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1 TARGET_EXEC := libJava_$(NATIVE_PACKAGE).so
2
3 LDFLAGS = -shared -fPIC -Wl,-soname,$(TARGET_EXEC).$(MAJOR).$(MINOR)
4
5 SRC_DIRS := .
6 %:
7 @echo Making '$@' $(if $^,from '$^')
8 # @echo 'MAJOR=$(MAJOR)'
9 # @echo 'MINOR=$(MINOR)'
10 @echo 'SRC_DIRS=$(SRC_DIRS)'
11 @echo 'BUILD_DIR=$(BUILD_DIR)'
12
13
14 #
15 # Generic Argeo
16 #
17 BUILD_DIR := $(SDK_BUILD_BASE)/$(NATIVE_PACKAGE)
18 #BUILD_DIR := ./build
19 #META_INF_DIR := ./../META-INF
20 #ARCH := $(shell uname -p)
21
22 # Every folder in ./src will need to be passed to GCC so that it can find header files
23 INC_DIRS := $(shell find $(SRC_DIRS) -type d) /usr/lib/jvm/java/include /usr/lib/jvm/java/include/linux
24
25 .PHONY: clean all ide
26 all: $(SDK_BUILD_BASE)/$(TARGET_EXEC)
27
28 # Find all the C and C++ files we want to compile
29 # Note the single quotes around the * expressions. Make will incorrectly expand these otherwise.
30 SRCS := $(shell find $(SRC_DIRS) -name '*.cpp' -or -name '*.c' -or -name '*.s')
31
32 # String substitution for every C/C++ file.
33 # As an example, hello.cpp turns into ./build/hello.cpp.o
34 OBJS := $(SRCS:%=$(BUILD_DIR)/%.o)
35
36 # String substitution (suffix version without %).
37 # As an example, ./build/hello.cpp.o turns into ./build/hello.cpp.d
38 DEPS := $(OBJS:.o=.d)
39
40 # Add a prefix to INC_DIRS. So moduleA would become -ImoduleA. GCC understands this -I flag
41 INC_FLAGS := $(addprefix -I,$(INC_DIRS))
42
43 # The -MMD and -MP flags together generate Makefiles for us!
44 # These files will have .d instead of .o as the output.
45 CPPFLAGS := $(INC_FLAGS) -MMD -MP
46
47 # The final build step.
48 $(SDK_BUILD_BASE)/$(TARGET_EXEC): $(OBJS)
49 $(CC) $(OBJS) -o $@ $(LDFLAGS)
50
51 # Build step for C source
52 $(BUILD_DIR)/%.c.o: %.c
53 mkdir -p $(dir $@)
54 $(CC) $(CPPFLAGS) $(CFLAGS) -c $< -o $@
55
56 # Build step for C++ source
57 $(BUILD_DIR)/%.cpp.o: %.cpp
58 mkdir -p $(dir $@)
59 $(CXX) $(CPPFLAGS) $(CXXFLAGS) -c $< -o $@
60
61 clean:
62 rm -r $(BUILD_DIR) $(SDK_BUILD_BASE)/$(TARGET_EXEC)
63
64 # Include the .d makefiles. The - at the front suppresses the errors of missing
65 # Makefiles. Initially, all the .d files will be missing, and we don't want those
66 # errors to show up.
67 -include $(DEPS)
68
69 # MAKEFILE_DIR := $(dir $(firstword $(MAKEFILE_LIST)))